CLEON  Version 1
Cloud-Offloaded GPS Receiver
cleon_conf.h
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1 
7 #ifndef __CLEON_CONF_H__
8 #define __CLEON_CONF_H__
9 
10 // All the debug functions will be disabled if 'DEBUG_MODE' is set to '_DISABLE', or vice versa with '_ENABLE_'
11 #define DEBUG_MODE _DISABLE_
12 
13 #define DUMP_SYSTEM_INFO_VIA_USB _ENABLE_
14 #define DUMP_SENSOR_VALUE_VIA_USB _ENABLE_
15 #define DUMP_TIME_INFO_VIA_USB _ENABLE_
16 
20 //----------------------------- Port definition --------------------------------
21 #define EXT_FLASH_MOSI_PORT(type) P8##type /* P8.5 - Output: External FLASH SPI MOSI */
22 #define EXT_FLASH_MOSI_PIN 5
23 
24 #define EXT_FLASH_MISO_PORT(type) P8##type /* P8.6 - Input: External FLASH SPI MISO */
25 #define EXT_FLASH_MISO_PIN 6
26 
27 #define EXT_FLASH_CLK_PORT(type) P8##type /* P8.4 - Output: External FLASH SPI CLK */
28 #define EXT_FLASH_CLK_PIN 4
29 
30 #define EXT_FLASH_CS_PORT(type) P1##type /* P1.7 - Output: External FLASH chip select */
31 #define EXT_FLASH_CS_PIN 7
32 
33 #define EXT_FLASH_WP_PORT(type) P1##type /* P1.4 - Output: External FLASH write protect */
34 #define EXT_FLASH_WP_PIN 4
35 
36 #define EXT_FLASH_HOLD_PORT(type) P8##type /* P8.7 - Output: External FLASH hold */
37 #define EXT_FLASH_HOLD_PIN 7
38 
42 //----------------------------- Port definition --------------------------------
43 #define MICROSD_MOSI_PORT(type) P8##type /* P8.5 - Output: MicroSD SPI MOSI */
44 #define MICROSD_MOSI_PIN 5
45 
46 #define MICROSD_MISO_PORT(type) P8##type /* P8.6 - Input: MicroSD SPI MISO */
47 #define MICROSD_MISO_PIN 6
48 
49 #define MICROSD_CLK_PORT(type) P8##type /* P8.4 - Output: MicroSD SPI CLK */
50 #define MICROSD_CLK_PIN 4
51 
52 #define MICROSD_CS_PORT(type) P1##type /* P1.6 - Output: MicroSD chip select */
53 #define MICROSD_CS_PIN 6
54 
55 #define MICROSD_STATUS_PORT(type) P1##type /* P1.2 - Input: MicroSD status */
56 #define MICROSD_STATUS_PIN 2
57 
61 //----------------------------- Port definition --------------------------------
62 #define XT2_PORT(type) P7##type
63 #define XT2OUT_PIN 3 /* P7.3 - Output: XT2 clock output */
64 #define XT2IN_PIN 2 /* P7.2 - Input: XT2 clock input */
65 
69 //----------------------------- Port definition --------------------------------
70 #define BOOST_SHDN_N_PORT(type) P7##type
71 #define BOOST_SHDN_N_PIN 4 /* P7.4 - Output: Boost-up regulator shut down */
72 #define GPS_PWR_SHDN_N_PORT(type) P9##type
73 #define GPS_PWR_SHDN_N_PIN 0 /* P9.0 - Output: GPS power shut down */
74 
78 //----------------------------- Port definition --------------------------------
79 #define USER_SW_PORT(type) P1##type
80 #define USER_SW_PIN 0 /* P1.0 - Input: User switch */
81 
85 //----------------------------- Port definition --------------------------------
86 #define SENSOR_SHT11_PORT(type) P2##type
87 #define SENSOR_SHT11_SDA_PIN 5 /* P2.5 - Input: SHT11 sensor value */
88 #define SENSOR_SHT11_SCL_PIN 6 /* P2.6 - Output: SHT11 clock */
89 #define SENSOR_SHT11_PWR_PIN 7 /* P2.7 - Output: SHT11 Power */
90 
94 //----------------------------- Port definition --------------------------------
95 #define SENSOR_S1087_PORT(type) P7##type
96 #define SENSOR_S1087_PIN 7 /* P7.7 - Input (ADC): S1087 sensor value */
97 
101 //----------------------------- Port definition --------------------------------
102 #define SENSOR_S108701_PORT(type) P7##type
103 #define SENSOR_S108701_PIN 6 /* P7.6 - Input (ADC): S1087-01 sensor value */
104 
108 //----------------------------- Port definition --------------------------------
109 #define LED1_PORT(type) P9##type
110 #define LED1_PIN 7 /* P9.7 - Output: LED1 */
111 #define LED2_PORT(type) P9##type
112 #define LED2_PIN 6 /* P9.6 - Output: LED2 */
113 #define LED3_PORT(type) P9##type
114 #define LED3_PIN 5 /* P9.5 - Output: LED3 */
115 #define LED4_PORT(type) P8##type
116 #define LED4_PIN 1 /* P8.1 - Output: LED4 */
117 #define LED5_PORT(type) P8##type
118 #define LED5_PIN 0 /* P8.0 - Output: LED5 */
119 #define LED6_PORT(type) P1##type
120 #define LED6_PIN 5 /* P1.5 - Output: LED6 */
121 
122 #define MICRO_SD_ERROR_LED_ON() LED1_ON()
123 #define MICRO_SD_ERROR_LED_OFF() LED1_OFF()
124 #define MICRO_SD_ERROR_LED_TOGGLE() LED1_TOGGLE()
125 
126 #define SAMPLING_IN_ACTION_LED_ON() LED2_ON()
127 #define SAMPLING_IN_ACTION_LED_OFF() LED2_OFF()
128 #define SAMPLING_IN_ACTION_LED_TOGGLE() LED2_TOGGLE()
129 
130 #define TIME_SYNC_ERROR_LED_ON() LED3_ON()
131 #define TIME_SYNC_ERROR_LED_OFF() LED3_OFF()
132 #define TIME_SYNC_ERROR_LED_TOGGLE() LED3_TOGGLE()
133 
134 #define GPS_ERROR_LED_ON() LED6_ON()
135 #define GPS_ERROR_LED_OFF() LED6_OFF()
136 #define GPS_ERROR_LED_TOGGLE() LED6_TOGGLE()
137 
141 //----------------------------- Port definition --------------------------------
142 #define USB_PORT(type) P8##type
143 #define USB_TXD_PIN 2 /* P8.2 - Output: UCA1 TXD */
144 #define USB_RXD_PIN 3 /* P8.3 - Input: UCA1 RXD */
145 
146 #define USB_STATUS_PORT(type) P1##type
147 #define USB_STATUS_PIN 3 /* P1.3 - Input: USB status */
148 
152 //================================= GPS Data ===================================
153 //----------------------------- Port definition --------------------------------
154 /* DMA external trigger */
155 #define MAX2769_EXT_DMA_TRIG_PORT(type) P2##type
156 #define MAX2769_EXT_DMA_TRIG_PIN 1 /* P2.1 - Input: External DMA trigger for MAX2769 */
157 
158 /* P3IN : 0x0220h */
159 #define MAX2769_Q0_PORT(type) P3##type
160 #define MAX2769_Q0_1_PIN 0 /* P3.0 - Input: Q0 (1st Q0 bit) for MAX2769 */
161 #define MAX2769_Q0_2_PIN 1 /* P3.1 - Input: Q0 (2nd Q0 bit) for MAX2769 */
162 #define MAX2769_Q0_3_PIN 2 /* P3.2 - Input: Q0 (3rd Q0 bit) for MAX2769 */
163 #define MAX2769_Q0_4_PIN 3 /* P3.3 - Input: Q0 (4th Q0 bit) for MAX2769 */
164 #define MAX2769_Q0_5_PIN 4 /* P3.4 - Input: Q0 (5th Q0 bit) for MAX2769 */
165 #define MAX2769_Q0_6_PIN 5 /* P3.5 - Input: Q0 (6th Q0 bit) for MAX2769 */
166 #define MAX2769_Q0_7_PIN 6 /* P3.6 - Input: Q0 (7th Q0 bit) for MAX2769 */
167 #define MAX2769_Q0_8_PIN 7 /* P3.7 - Input: Q0 (8th Q0 bit) for MAX2769 */
168 
169 /* P4IN : 0x0221h */
170 #define MAX2769_Q1_PORT(type) P4##type
171 #define MAX2769_Q1_1_PIN 0 /* P4.0 - Input: Q1 (1st Q1 bit) for MAX2769 */
172 #define MAX2769_Q1_2_PIN 1 /* P4.1 - Input: Q1 (2nd Q1 bit) for MAX2769 */
173 #define MAX2769_Q1_3_PIN 2 /* P4.2 - Input: Q1 (3rd Q1 bit) for MAX2769 */
174 #define MAX2769_Q1_4_PIN 3 /* P4.3 - Input: Q1 (4th Q1 bit) for MAX2769 */
175 #define MAX2769_Q1_5_PIN 4 /* P4.4 - Input: Q1 (5th Q1 bit) for MAX2769 */
176 #define MAX2769_Q1_6_PIN 5 /* P4.5 - Input: Q1 (6th Q1 bit) for MAX2769 */
177 #define MAX2769_Q1_7_PIN 6 /* P4.6 - Input: Q1 (7th Q1 bit) for MAX2769 */
178 #define MAX2769_Q1_8_PIN 7 /* P4.7 - Input: Q1 (8th Q1 bit) for MAX2769 */
179 
180 /* P5IN : 0x0240h */
181 #define MAX2769_I0_PORT(type) P5##type
182 #define MAX2769_I0_1_PIN 0 /* P5.0 - Input: I0 (1st I0 bit) for MAX2769 */
183 #define MAX2769_I0_2_PIN 1 /* P5.1 - Input: I0 (2nd I0 bit) for MAX2769 */
184 #define MAX2769_I0_3_PIN 2 /* P5.2 - Input: I0 (3rd I0 bit) for MAX2769 */
185 #define MAX2769_I0_4_PIN 3 /* P5.3 - Input: I0 (4th I0 bit) for MAX2769 */
186 #define MAX2769_I0_5_PIN 4 /* P5.4 - Input: I0 (5th I0 bit) for MAX2769 */
187 #define MAX2769_I0_6_PIN 5 /* P5.5 - Input: I0 (6th I0 bit) for MAX2769 */
188 #define MAX2769_I0_7_PIN 6 /* P5.6 - Input: I0 (7th I0 bit) for MAX2769 */
189 #define MAX2769_I0_8_PIN 7 /* P5.7 - Input: I0 (8th I0 bit) for MAX2769 */
190 
191 /* P6IN : 0x0241h */
192 #define MAX2769_I1_PORT(type) P6##type
193 #define MAX2769_I1_1_PIN 0 /* P6.0 - Input: I1 (1st I1 bit) for MAX2769 */
194 #define MAX2769_I1_2_PIN 1 /* P6.1 - Input: I1 (2nd I1 bit) for MAX2769 */
195 #define MAX2769_I1_3_PIN 2 /* P6.2 - Input: I1 (3rd I1 bit) for MAX2769 */
196 #define MAX2769_I1_4_PIN 3 /* P6.3 - Input: I1 (4th I1 bit) for MAX2769 */
197 #define MAX2769_I1_5_PIN 4 /* P6.4 - Input: I1 (5th I1 bit) for MAX2769 */
198 #define MAX2769_I1_6_PIN 5 /* P6.5 - Input: I1 (6th I1 bit) for MAX2769 */
199 #define MAX2769_I1_7_PIN 6 /* P6.6 - Input: I1 (7th I1 bit) for MAX2769 */
200 #define MAX2769_I1_8_PIN 7 /* P6.7 - Input: I1 (8th I1 bit) for MAX2769 */
201 
202 //=============================== GPS Control ==================================
203 //----------------------------- Port definition --------------------------------
204 #define MAX2769_SHDN_N_PORT(type) P9##type
205 #define MAX2769_SHDN_N_PIN 1 /* P9.1 - Output: /SHDN to MAX2769 */
206 
207 #define MAX2769_IDLE_N_PORT(type) P9##type
208 #define MAX2769_IDLE_N_PIN 4 /* P9.4 - Output: /IDLE to MAX2769 */
209 
210 #define MAX2769_LD_PORT(type) P2##type
211 #define MAX2769_LD_PIN 4 /* P2.4 - Input: LD from MAX2769 */
212 //=============================== GPS program ==================================
213 //----------------------------- Port definition --------------------------------
214 #define MAX2769_PGM_EN_N_PORT(type) P9##type
215 #define MAX2769_PGM_EN_N_PIN 3 /* P9.3 - Output: PGM_EN to MAX2769 */
216 
217 #define MAX2769_PGM_CS_N_PORT(type) P9##type
218 #define MAX2769_PGM_CS_N_PIN 2 /* P9.2 - Output: /CS to MAX2769 */
219 
220 #define MAX2769_PGM_SCLK_PORT(type) P2##type
221 #define MAX2769_PGM_SCLK_PIN 3 /* P2.3 (UCB0CLK) - SPI: SCLK to MAX2769 */
222 
223 #define MAX2769_PGM_SDATA_PORT(type) P2##type
224 #define MAX2769_PGM_SDATA_PIN 2 /* P2.2 (UCB0SIMO)- SPI: SDATA to MAX2769 */
225 
226 #endif