CLEON  Version 1
Cloud-Offloaded GPS Receiver
hal_dma.c
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1 
7 #include "cleon_conf.h"
8 #include "app_define.h"
9 #include "sys_define.h"
10 #include "hal_define.h"
11 #include "fs_define.h"
12 
13 // CLEON data structure
14 extern cleon_header_u uniCLEONHeader;
15 extern cleon_gps_data_u uniCLEONGPSData;
16 extern cleon_sensor_data_u uniCLEONSensorData;
17 
18 // Flags
19 bool bFLAG_DMATransferCompleted = _CLEAR_;
20 
21 /*----------------------------------------------------------------------------*/
29 void HAL_DMA_Init(void)
30 {
31  // External DMA trigger is mapped to P2.1
32  MAX2769_EXT_DMA_TRIG_PORT(SEL) |= BV(MAX2769_EXT_DMA_TRIG_PIN);
33  MAX2769_EXT_DMA_TRIG_PORT(DIR) &= ~BV(MAX2769_EXT_DMA_TRIG_PIN);
34 
35  // Port mapping for P2.1
36  PMAPKEYID = PMAPKEY;
37  // P2.1 is mapped to external DMA trigger
38  P2MAP1 = 0x02;
39 
40  // Set external input as DMA trigger
41  DMACTL0 = DMA0TSEL_31;
42 
43  // Read-modify-write disable
44  DMACTL4 = DMARMWDIS;
45  DMA0CTL &= ~DMAIFG;
46 
47  // DMA destination address will be incremental while DMA source address won't be changed
48  DMA0CTL = DMADSTINCR_3;
49 
50  // Enabling DMA transfer till the size of 'SIZE_OF_GPS_DATA_CHUNK_IN_WORDS' reached
51  DMA0SZ = SIZE_OF_GPS_DATA_CHUNK_IN_BYTE / 2;
52 
53  // Set DMA source address to base address of P5IN (0x0240)
54  // Because P5IN and P6IN are adjuscent registers with 1 byte offset,
55  // P5IN and P6IN will be transferred at a time if accessed with length of word (16 bit)
56  __data16_write_addr((unsigned short) &DMA0SA,(unsigned long) 0x0240);
57 
58  // DMA destination address setting : address of 'GPSData' structure
59  __data16_write_addr((unsigned short) &DMA0DA,(unsigned long) &uniCLEONGPSData);
60 
61  // Enabling DMA interrupt
62  DMA0CTL |= DMAIE;
63 }
64 
65 //------------------------------------------------------------------------------
66 // DMA Interrupt Service Routine
67 //------------------------------------------------------------------------------
68 #pragma vector=DMA_VECTOR
69 __interrupt void DMA_VECTOR_ISR(void)
70 {
71  switch(__even_in_range(DMAIV,16))
72  {
73  case 0: break;
74  case 2:
75  bFLAG_DMATransferCompleted = _SET_;
76  break;
77  case 4: break;
78  case 6: break;
79  case 8: break;
80  case 10: break;
81  case 12: break;
82  case 14: break;
83  case 16: break;
84  default: break;
85  }
86 }
87 
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