hal_pmm.h File Reference

PMM configuration. More...

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Macros
#define	HAL_ENTER_LPM4()   __bis_SR_register(LPM4_bits + GIE)
#define	ENABLE_SVSL()   st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVSLE; PMMCTL0_H = 0x00; )
#define	DISABLE_SVSL()   st(PMMCTL0_H = 0xA5; SVSMLCTL &= ~SVSLE; PMMCTL0_H = 0x00; )
#define	ENABLE_SVML()   st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVMLE; PMMCTL0_H = 0x00; )
#define	DISABLE_SVML()   st(PMMCTL0_H = 0xA5; SVSMLCTL &= ~SVMLE; PMMCTL0_H = 0x00; )
#define	ENABLE_SVSH()   st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVSHE; PMMCTL0_H = 0x00; )
#define	DISABLE_SVSH()   st(PMMCTL0_H = 0xA5; SVSMHCTL &= ~SVSHE; PMMCTL0_H = 0x00; )
#define	ENABLE_SVMH()   st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVMHE; PMMCTL0_H = 0x00; )
#define	DISABLE_SVMH()   st(PMMCTL0_H = 0xA5; SVSMHCTL &= ~SVMHE; PMMCTL0_H = 0x00; )
#define	ENABLE_SVSL_SVML()   st(PMMCTL0_H = 0xA5; SVSMLCTL |= (SVSLE + SVMLE); PMMCTL0_H = 0x00; )
#define	DISABLE_SVSL_SVML()   st(PMMCTL0_H = 0xA5; SVSMLCTL &= ~(SVSLE + SVMLE); PMMCTL0_H = 0x00; )
#define	ENABLE_SVSH_SVMH()   st(PMMCTL0_H = 0xA5; SVSMHCTL |= (SVSHE + SVMHE); PMMCTL0_H = 0x00; )
#define	DISABLE_SVSH_SVMH()   st(PMMCTL0_H = 0xA5; SVSMHCTL &= ~(SVSHE + SVMHE); PMMCTL0_H = 0x00; )
#define	ENABLE_SVSL_RESET()   st(PMMCTL0_H = 0xA5; PMMRIE |= SVSLPE; PMMCTL0_H = 0x00; )
#define	DISABLE_SVSL_RESET()   st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVSLPE; PMMCTL0_H = 0x00; )
#define	ENABLE_SVML_INTERRUPT()   st(PMMCTL0_H = 0xA5; PMMRIE |= SVMLIE; PMMCTL0_H = 0x00; )
#define	DISABLE_SVML_INTERRUPT()   st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVMLIE; PMMCTL0_H = 0x00; )
#define	ENABLE_SVSH_RESET()   st(PMMCTL0_H = 0xA5; PMMRIE |= SVSHPE; PMMCTL0_H = 0x00; )
#define	DISABLE_SVSH_RESET()   st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVSHPE; PMMCTL0_H = 0x00; )
#define	ENABLE_SVMH_INTERRUPT()   st(PMMCTL0_H = 0xA5; PMMRIE |= SVMHIE; PMMCTL0_H = 0x00; )
#define	DISABLE_SVMH_INTERRUPT()   st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVMHIE; PMMCTL0_H = 0x00; )
#define	CLEAR_PMM_IFGS()   st(PMMCTL0_H = 0xA5; PMMIFG = 0; PMMCTL0_H = 0x00; )
#define	SVSL_ENABLED_IN_LPM_FAST_WAKE()
#define	SVSL_ENABLED_IN_LPM_SLOW_WAKE()
#define	SVSL_DISABLED_IN_LPM_FAST_WAKE()
#define	SVSL_DISABLED_IN_LPM_SLOW_WAKE()
#define	SVSH_ENABLED_IN_LPM_NORM_PERF()
#define	SVSH_ENABLED_IN_LPM_FULL_PERF()
#define	SVSH_DISABLED_IN_LPM_NORM_PERF()
#define	SVSH_DISABLED_IN_LPM_FULL_PERF()
#define	SVSL_OPTIMIZED_IN_LPM_FAST_WAKE()
#define	SVSH_OPTIMIZED_IN_LPM_FULL_PERF()
#define	PMM_STATUS_OK   0
#define	PMM_STATUS_ERROR   1

Functions
void	HAL_PMM_Init (void)
	Initializing PMM.
uint16_t	SetVCore (uint8_t level)

Detailed Description

PMM configuration.

Definition in file hal_pmm.h.

Macro Definition Documentation

#define CLEAR_PMM_IFGS

(

)

st(PMMCTL0_H = 0xA5; PMMIFG = 0; PMMCTL0_H = 0x00; )

Definition at line 78 of file hal_pmm.h.

#define DISABLE_SVMH

(

)

st(PMMCTL0_H = 0xA5; SVSMHCTL &= ~SVMHE; PMMCTL0_H = 0x00; )

Definition at line 64 of file hal_pmm.h.

#define DISABLE_SVMH_INTERRUPT

(

)

st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVMHIE; PMMCTL0_H = 0x00; )

Definition at line 77 of file hal_pmm.h.

#define DISABLE_SVML

(

)

st(PMMCTL0_H = 0xA5; SVSMLCTL &= ~SVMLE; PMMCTL0_H = 0x00; )

Definition at line 60 of file hal_pmm.h.

#define DISABLE_SVML_INTERRUPT

(

)

st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVMLIE; PMMCTL0_H = 0x00; )

Definition at line 73 of file hal_pmm.h.

#define DISABLE_SVSH

(

)

st(PMMCTL0_H = 0xA5; SVSMHCTL &= ~SVSHE; PMMCTL0_H = 0x00; )

Definition at line 62 of file hal_pmm.h.

#define DISABLE_SVSH_RESET

(

)

st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVSHPE; PMMCTL0_H = 0x00; )

Definition at line 75 of file hal_pmm.h.

#define DISABLE_SVSH_SVMH

(

)

st(PMMCTL0_H = 0xA5; SVSMHCTL &= ~(SVSHE + SVMHE); PMMCTL0_H = 0x00; )

Definition at line 68 of file hal_pmm.h.

#define DISABLE_SVSL

(

)

st(PMMCTL0_H = 0xA5; SVSMLCTL &= ~SVSLE; PMMCTL0_H = 0x00; )

Definition at line 58 of file hal_pmm.h.

#define DISABLE_SVSL_RESET

(

)

st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVSLPE; PMMCTL0_H = 0x00; )

Definition at line 71 of file hal_pmm.h.

#define DISABLE_SVSL_SVML

(

)

st(PMMCTL0_H = 0xA5; SVSMLCTL &= ~(SVSLE + SVMLE); PMMCTL0_H = 0x00; )

Definition at line 66 of file hal_pmm.h.

#define ENABLE_SVMH

(

)

st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVMHE; PMMCTL0_H = 0x00; )

Definition at line 63 of file hal_pmm.h.

#define ENABLE_SVMH_INTERRUPT

(

)

st(PMMCTL0_H = 0xA5; PMMRIE |= SVMHIE; PMMCTL0_H = 0x00; )

Definition at line 76 of file hal_pmm.h.

#define ENABLE_SVML

(

)

st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVMLE; PMMCTL0_H = 0x00; )

Definition at line 59 of file hal_pmm.h.

#define ENABLE_SVML_INTERRUPT

(

)

st(PMMCTL0_H = 0xA5; PMMRIE |= SVMLIE; PMMCTL0_H = 0x00; )

Definition at line 72 of file hal_pmm.h.

#define ENABLE_SVSH

(

)

st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVSHE; PMMCTL0_H = 0x00; )

Definition at line 61 of file hal_pmm.h.

#define ENABLE_SVSH_RESET

(

)

st(PMMCTL0_H = 0xA5; PMMRIE |= SVSHPE; PMMCTL0_H = 0x00; )

Definition at line 74 of file hal_pmm.h.

#define ENABLE_SVSH_SVMH

(

)

st(PMMCTL0_H = 0xA5; SVSMHCTL |= (SVSHE + SVMHE); PMMCTL0_H = 0x00; )

Definition at line 67 of file hal_pmm.h.

#define ENABLE_SVSL

(

)

st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVSLE; PMMCTL0_H = 0x00; )

Definition at line 57 of file hal_pmm.h.

#define ENABLE_SVSL_RESET

(

)

st(PMMCTL0_H = 0xA5; PMMRIE |= SVSLPE; PMMCTL0_H = 0x00; )

Definition at line 70 of file hal_pmm.h.

#define ENABLE_SVSL_SVML

(

)

st(PMMCTL0_H = 0xA5; SVSMLCTL |= (SVSLE + SVMLE); PMMCTL0_H = 0x00; )

Definition at line 65 of file hal_pmm.h.

#define HAL_ENTER_LPM4

(

)

__bis_SR_register(LPM4_bits + GIE)

Definition at line 10 of file hal_pmm.h.

#define PMM_STATUS_ERROR   1

Definition at line 111 of file hal_pmm.h.

#define PMM_STATUS_OK   0

Definition at line 110 of file hal_pmm.h.

#define SVSH_DISABLED_IN_LPM_FULL_PERF

(

)

Value:

st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVSHFP; SVSMHCTL &= \
                                                ~(SVSMHACE + SVSHMD); PMMCTL0_H = 0x00; )

Definition at line 98 of file hal_pmm.h.

#define SVSH_DISABLED_IN_LPM_NORM_PERF

(

)

Value:

st(PMMCTL0_H = 0xA5; SVSMHCTL &= \
                                                ~(SVSMHACE + SVSHFP + SVSHMD); PMMCTL0_H = 0x00; )

Definition at line 96 of file hal_pmm.h.

#define SVSH_ENABLED_IN_LPM_FULL_PERF

(

)

Value:

st( \
        PMMCTL0_H = 0xA5; SVSMHCTL |= (SVSHMD + SVSHFP); SVSMHCTL &= ~SVSMHACE; PMMCTL0_H = 0x00; )

Definition at line 93 of file hal_pmm.h.

#define SVSH_ENABLED_IN_LPM_NORM_PERF

(

)

Value:

st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVSHMD; SVSMHCTL &= \
                                                ~(SVSMHACE + SVSHFP); PMMCTL0_H = 0x00; )

Definition at line 91 of file hal_pmm.h.

#define SVSH_OPTIMIZED_IN_LPM_FULL_PERF

(

)

Value:

st(PMMCTL0_H = 0xA5; SVSMHCTL |= \
                                                 (SVSHMD + SVSHFP + SVSMHACE); PMMCTL0_H = 0x00; )

Definition at line 104 of file hal_pmm.h.

#define SVSL_DISABLED_IN_LPM_FAST_WAKE

(

)

Value:

st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVSLFP; SVSMLCTL &= \
                                                ~(SVSLMD + SVSMLACE); PMMCTL0_H = 0x00; )

Definition at line 86 of file hal_pmm.h.

#define SVSL_DISABLED_IN_LPM_SLOW_WAKE

(

)

Value:

st(PMMCTL0_H = 0xA5; SVSMLCTL &= \
                                                ~(SVSLFP + SVSMLACE + SVSLMD); PMMCTL0_H = 0x00; )

Definition at line 88 of file hal_pmm.h.

#define SVSL_ENABLED_IN_LPM_FAST_WAKE

(

)

Value:

st( \
        PMMCTL0_H = 0xA5; SVSMLCTL |= (SVSLFP + SVSLMD); SVSMLCTL &= ~SVSMLACE; PMMCTL0_H = 0x00; )

Definition at line 81 of file hal_pmm.h.

#define SVSL_ENABLED_IN_LPM_SLOW_WAKE

(

)

Value:

st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVSLMD; SVSMLCTL &= \
                                                ~(SVSLFP + SVSMLACE); PMMCTL0_H = 0x00; )

Definition at line 83 of file hal_pmm.h.

#define SVSL_OPTIMIZED_IN_LPM_FAST_WAKE

(

)

Value:

st(PMMCTL0_H = 0xA5; SVSMLCTL |= \
                                                 (SVSLFP + SVSLMD + SVSMLACE); PMMCTL0_H = 0x00; )

Definition at line 102 of file hal_pmm.h.

Function Documentation

void HAL_PMM_Init

(

void

)

Initializing PMM.

Returns

void

Parameters

void

Definition at line 24 of file hal_pmm.c.

{ 
    SysRstIv = SYSRSTIV;
    
    // Set Vcore voltage to level 2 in order to support 12MHz MCLK
    // SVSH enabled
    // SVSHRVL = 2 (2.04V), SVSMHRRL = 2 (2.14V)    
    SetVCore(2);
    
    // Enable SYSH and SVMH
    ENABLE_SVSH_SVMH();
    
    // Enable SVSH reset
    ENABLE_SVSH_RESET();
    
    // SVS is enabled in LPM as normal performance
    SVSH_ENABLED_IN_LPM_NORM_PERF();
    
    // Clear existing interrupt flags
    CLEAR_PMM_IFGS();
}

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uint16_t SetVCore

(

uint8_t

level

)

Definition at line 272 of file hal_pmm.c.

{
    uint16_t actlevel;
    uint16_t status = 0;

    level &= PMMCOREV_3;                   // Set Mask for Max. level
    actlevel = (PMMCTL0 & PMMCOREV_3);     // Get actual VCore
                                           // step by step increase or decrease
    while ((level != actlevel) && (status == 0)) {
        if (level > actlevel){
            status = SetVCoreUp(++actlevel);
        }
        else {
            status = SetVCoreDown(--actlevel);
        }
    }

    return status;
}

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